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Author Topic: Enterprise Deployment Attempt Over FPGA. (Read 10445 times)

Offline ron

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Enterprise Deployment Attempt Over FPGA.
« on: 2020.May.05. 11:26:09 »
Greetings to all users and lovers of the Elan Enterprise.

Not long ago, we formed a small team of retro computer enthusiasts and were able to implement several things, including Oric's core with Microdisc. Anyway, in the group there are users with great knowledge of Z80 and Enterprise HW.

Currently we have a fairly solid group and we are open to anyone who can contribute documentation and knowledge.

The main objective is to achieve an Enterprise 128 implementation that works on FPGA boards like MiST, MiSTica and SiDi and so that later FPGAs like the MiSTer can be ported.

Two of the main pitfalls to overcome are the ASICs or Custom:  Nick and Dave, since there is no implementation and all we have are the emulators and the documentation that we all know.

How could it be otherwise, Glorez is on the team as he is one of our best Enterprise ambassadors. GFlorez will be our interface with EntepriseForEver and RetroWiki and the Telegram group.

Without haste but without pause, no matter how long it can consume, it is something done totally altruistically, unconditionally and without any kind of profit.

We have to focus our efforts to get the best possible implementation from Nick and Dave. It is key, because the rest of the core is more or less already defined.
The first things we need is to have the Nick's Video base to start painting on the screen and gradually add all the development. Dave's part seems more affordable.

We hope you find this project interesting and we invite you to participate. We will create a thread in Spanish on RetroWiki to be able to exchange knowledge and impressions.

This is all for now, we will inform you promptly and we hope you like it.

Best Regards.
ron.

Offline ron

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #1 on: 2020.May.05. 11:45:47 »
Here is the post at RetroWiki in Spanish:
http://www.retrowiki.es/viewtopic.php?f=108&t=200035693

Saludos !

Offline geco

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #2 on: 2020.May.05. 13:49:08 »
Great news, if it is ready, i will interested about buying a hw :)
Zozo posted schematics of Nick few days ago somewhere in the forum, and probably source of IstvánV's great EP128emu can help a lot.
As i know there is a HW project also in Hungary where EP is included also, unfortunately i do not remember who makes it, i just know i saw the working hw once, but Nick emulation was not perfect.

Online gflorez

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #3 on: 2020.May.05. 14:27:05 »
Yes, but FPGA is not emulating, it is the real thing implemented inside a programmable chip. Nothing to do with R-Pi emulation.

All the discrete chips of the EP can easily be implemented, but are the ASIC chips, Nick and Dave what are a mystery inside. The designs we have are not the definitive versions.

Of course, IstvanV's great emulator will be invaluable in the task due to the perfection it has achieved. But at the end is the real machine what will be cloned.

All aid will be welcomed in this project, if you find the makers of the Hungarian project, please put them in contact.

Thanks!.

Offline ergoGnomik

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #4 on: 2020.May.05. 14:35:08 »
If the project geco is talking about is Z80MU, then that's not a hardware emulator but a software implemented for a custom hardware.

Obviously, ep128emu can't be used as a direct base for VHDL programming, but as it is a cycle-exact emulation, it can be used as an information source of what, when and why happening in those ASICs.

Offline geco

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #5 on: 2020.May.05. 14:52:21 »
Yes, sorrry, i thought it is a hw stuff.

Online gflorez

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #6 on: 2020.May.05. 15:31:09 »
I have thought-out.... if this project goes on.... It would be a great enjoyment for the old guy that designed the Nick chip to know about it. Maybe even participate, but this is an open project and involving him has to be considered by all.

Offline Dr.OG

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ÉN ekelek, TE keregsz, Ő gyeleg,
MI ákolunk, TI vornyáztok, ŐK lendeznek.

Offline ergoGnomik

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #8 on: 2020.May.05. 16:28:51 »
the old guy that designed the Nick chip

I do understand that you had no such intention, but referring to Mr. Nicholas Toop as the old guy seems a bit disrespectful.

Online gflorez

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #9 on: 2020.May.05. 20:23:54 »
Do you think it? Not for me, and not just when I am writing about how he would enjoy knowing this project. I can't at the same time be insulting him.

Take it as an affectionate nickname, my admiration to a man on that privileged status, a man that has lived intensely and that has a knowledge.

----

But I want to explain the motivations I have when I come here to this web page that I consider my home.

I come here to lean from others, even the most humble user of the page can amaze me with some topic, from the Enterprise or not. I have found here people that have shared their knowledge without asking me how much I know, who I am or from where I come. I think I have acted  the same with others, with courtesy, humour and respect.

Only a short number of members here have the English language as their native language, so it is possible that a British speaker can found a lot of incorrections on the messages we share. That is the reason why we can't take all expressions as literals, because then we could start the Third World War in few seconds

Better let's take the words on the context, reading carefully, forgiving us for the mistakes that we sure make when expressing ourselves. It is only my desire.

Offline ron

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #10 on: 2020.May.05. 20:49:00 »
Dr.Og ! very nice ! Thanks for the links. !

I hope no one bothers about a loving nickname. I have no doubt that GFlorez has cited Mr Toop ( if that's the case ) with the utmost respect and with all appreciation and love. I would be very happy to know that Mr. Toop could help us to preserve the Enterprise in FPGA, just as many of us will surely be.

Let's go for the core !

Regards
ron

Offline ron

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #11 on: 2020.May.05. 21:38:13 »
To do a first approach to the core, I will try to explain what we plan to do.

There are two coders who do great things. They are Gyorgy (Gyurco aka slingshot) and Sorgelig. Both are among the most representative in MiST and MiSTer. Both have two separate Sam Coupé cores implemented.

Calm down, let's be calm. Yes, I said Sam Coupé. But I will explain what all this means. Everyone knows that the Enterprise is a better micro than the Sam Coupé. Enter is a design from 1983, Sam is almost 1989.

Isn't it strange to have the Sam Coupé instead of the Videoton as a base?. The Videoton is similar in software, but not in hardware, which is what it's all about here. We believe that Miles Gordon Technologies must have looked sideways at the Enterprise, because coincidentally, there are many circumstances that make it optimal to take advantage of what has already been done.

This is the Sorgelig's git: https://github.com/sorgelig/SAMCoupe_MIST
This is the gyurco ( slingshot) git: https://github.com/gyurco/SAMCoupe_MIST

Obviously the core of Enteprise once it is ready to implement Nick and Dave is not going to look anything like the original.

The rom is already loading it by ioctl_download to the sdram, paging to 16Kb blocks ... it is not so different ... with the appropriate changes we do not see any impediment to use them as a base on which to implement. It is a good start. From what we see the way of reading the keyboard is very similar to that of AY. About Dave, it's very similar. At The moment we have clear audio records, it will not be very difficult to prototype that chip and the paging based on outs is cpm type.

In a later phase it is a question of supplanting the ASIC of Sam by Nick and SAA by Dave.

It is an initial stage it is about prototyping until the nick is able to start generating and painting video. We have to see how far we can go, since in other cores the parts that were missing until the schemes were obtained or decapped, were based on what was written in emulators.

Feel free to comment and add what arouses your interest or points of view.

Regards
ron


Offline dangerman

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #12 on: 2020.May.06. 22:40:18 »
Wow - this is very exciting news. :mrgreen:

I guess the hardest bits will be programming the Nick chip's line parameter table. And of course getting cycle exact emulation (but that can always be worked out later).

The official Nick and Dave chip documentation provides a very good start: 
http://ep.homeserver.hu/Dokumentacio/Konyvek/EXOS_2.1_technikal_information/hardware/Nick.html
http://ep.homeserver.hu/Dokumentacio/Konyvek/EXOS_2.1_technikal_information/hardware/Dave.html

And IstanV knows a lot about the undocumented behaviour!

Online gflorez

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #13 on: 2020.May.07. 11:29:17 »
Thanks dangerman.

These links are extracted from the official Nick and Dave documents that we are already managing. Do they have any fixing over the originals?

Yes, of course we want IstvanV advice and collaboration.




Offline ergoGnomik

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