This is not an Enterprise issue as such but I wanted some advice on using DRAM.
I have a synth that has the facility to upgrade the sample memory with a card using
256k x 1bit DRAM, 12 of them. These IC's have a single write enable line (W) and
separate input and out bits (D) and (Q) which are tied together.
That seems simple enough.
I want to create a memory card that uses 256k x 4bits, 3 of them. These IC's have a
single write enable (WE) AND an output enable (OE) and the 4 bits are I/O ports.
So again this seems easy enough apart from the usage of the WE and OE. I have a single
write enable (W) coming in so my question is, does anyone have experience using these and
how do the (WE) and (OE) get derived from a single (W)?
My assumption so far is that the (W) will go to the (WE).
Russ