the old guy that designed the Nick chip
These links are extracted from the official Nick (http://enterprise.iko.hu/technical/ET1-3_Nick_Chip_Programmers_Guide.pdf) and Dave (http://enterprise.iko.hu/technical/DAVE_ISSUE5.pdf) documents that we are already managing. Do they have any fixing over the originals?
Greetings to all users and lovers of the Elan Enterprise.
The main objective is to achieve an Enterprise 128 implementation that works on FPGA boards like MiST, MiSTica and SiDi and so that later FPGAs like the MiSTer can be ported.
Is possible when the development done, create new Nick and Dave chips which can be used for repair dead Enterprise machines?
The graphic modes aren't still implemented....Palette colors are also not :oops: This is why visible the ERROR at the memory test. It is using the second color pair, and normaly set to black letters, only changed to red when memory error found.
Still not totally good interruptions. And no Basic.Great!!! :smt041
Kyp is hardly still developing the core. This is his last post:It is very sad :(
"The biggest problem the EP has is that many of the things it does with signals are managed in a 'incompatible' way with FPGAs. It has lots of latches and registers that work with clocks coming out from other logic gates and FPGAs don't like that at all."
It is very sad :(
You have not understood him.I'm sorry to say this, but it is actually you who made Tutus misunderstand. You see, working hard and hardly working are very different things. Working hard means that somebody makes great efforts to achieve the goal. Hardly working means doing not much or barely anything. Yes, hardly and hard can be used as equivalents, but that is not the usual or most common meaning of hardly.
I say this just for information, not to criticize, I am in awe at people's ability to use English on this forum :bow: it puts my language skills to shame :oops: :oops: :oops:
hardly and hard can be used as equivalentsI think they cannot be used as equivalents. But you are right saying "hardly" means "very-very little" or "almost not". As I know "hardly" can have nothing to do with "hard". But correct me if it is not true.
as i saw Nick interrupt is on int1, and nothing on int2
Well I just wired the VSYNC interrupts directly to the INT signal of the CPU, but I guess it's not correct. I'm not sure about how interrupts work in general. I have read about Dave's registers, but I am not sure how they work. For example, what is connected to INT1 or INT2?
Is there something similar to test the Enterprise?You may try to ask IstvanV (https://enterpriseforever.com/profile/?u=80) of ep128emu (https://github.com/istvan-v/ep128emu) fame if he had something around those lines during the development of his emulator.
Other aspect was that a lot of programs failed to load, but I think that it was due to lack of Ram space. Kyp says he will add more on the next update.Yes, most programs are not running on EP64, old Speccy ports because they are using fix segments (F8-FB) except Zozo's conversions, most of newer ones need more memory.
In what condition does the "controller not ready" error occur and what does it look for to get the 193 exdos1.4 error ?It outputs test values to ports 11h and 12h, and checks that the values can be read back at 15h and 16h (ports 10h-13h are mirrored at 14h-17h if the EXDOS card is there.) The test values are 55h and aah but then the test is repeated with the values swapped ie. aah and 55h.
; Return Z if an EXDOS card is there, NZ if no EXDOS card
WDCHECK: LD A,55H
OUT (11H),A
LD A,0AAH
OUT (12H),A
PUSH BC
PUSH BC
POP BC
POP BC
IN A,(15H)
CP 55H
RET NZ
IN A,(16H)
CP 0AAH
RET NZ
LD A,0AAH
OUT (11H),A
LD A,55H
OUT (12H),A
PUSH BC
PUSH BC
POP BC
POP BC
IN A,(15H)
CP 0AAH
RET NZ
IN A,(16H)
CP 55H
RET
(Attachment Link)
Tonight starting at 10 pm, we are going to premiere Kyp's core live.
You can see the stream, in Spanish on Twitch: https://www.twitch.tv/retrocrypta
I was watching the Raid over Moscow at about 49:00 and I can clearly see a problem with the horizontal scroll.
I am curious what horizontal SYNC frequency the FPGA produces. Is it the original 15 khz?
I would suggest to test EXOLON 1 game.It works :D (Yes, I know, there is a problem with the last pixels in every line ;) but it happens always in this video mode)
This is very special. The vertical resolution is about 100 lines, and every line has a record in the NICK Line Parameter Table.
It uses Spectrum-type attribute mode graphics.
Until now they had the barrier of the lack of a massive storage.
(Attachment Link)
You can see the stream, in Spanish on Twitch: https://www.twitch.tv/retrocrypta
A lot of thanks to rampa069, GFlorez and Kyp by the effort
Just now noticed the word "Elképesztő" on the advertisement, that's amazing ;-) !
Dr.OG, is a nod ;-) from the Spanish fans of Enterprise to the Hungarian community, who are highly respected and valued, in fact you will see the logo of the Enteprise Forever forum.I did notice the forum's logo there :-) I'm always amazed by how many EP fans there are all over the world. I'm happy our forum could help these people to reach each other.
Dr.OG, is a nod ;-) from the Spanish fans of Enterprise to the Hungarian community, who are highly respected and valued, in fact you will see the logo of the Enteprise Forever forum.
Az Ön segítsége és tanácsa nagyon fontos számunkra.
in Fred i see also some wrong coloursThat was a quick test, I'll compare it against Emu128 for differences.
I sent a mail to you about 1-2 weeks ago, about some other links, just before my mail about 4 colour character mode, did not you get it?Yes, I got it and made some tests with weird results :mad:
I just can't see what I'm doing wrong, why sometimes the colors look good and other times they don't.Yes, it is strange, because there are programs which have quite good colour assignment, and some which strange, ex Exolon CPC conversion, and from the pictures what you posted below, i see that there is a problem with bias colours, i do not see too much problem on Fred main screen, but the attribute picture use few bias colours.
background colour is chosen from bias, because bit7 is set, and colour is 0ffh (white) = 0f8h + 07h¿BIAS value is added to colour value or replaces bits in colour value?
¿BIAS value is added to colour value or replaces bits in colour value?
Now CPU speed is correctNot fully, it is 4.06 instead of 4.00 Mhz :oops:
Not fully, it is 4.06 instead of 4.00 Mhz :oops:Sure, Nick's pixel clock runs at 14,000 MHz, I'll fix that sooner or later :roll:
Also possible because the Nick chip speed are not fully correct.
Yesterday's (https://www.twitch.tv/videos/1412297821)(01-03-22) Twitch emission of Retrocrypta by Ron.Coool, when will it start? if after 20:00 CET, i will join also with some beers :D
Today he promises another session....
Yes. Dave is starting to sound as "dave" :-) tonight i have some success with fred. seems fred is using every option in the sound chip... :-)As I remember it uses only the polynomial counters, filters and ring modulation is not used, but Szipucsu can correct me, he created the music from Midi.
Yes please.... One question (still tring to compile ep128emu on mac m1) Does fred sounds ok on ep128emu?I will check converted midi's :)
Does fred sounds ok on ep128emu?ep128emu are 99.99% accurate.
Yes please....
I remember Tutus trying to compile it on Mac, because it is the same machine he uses to edition.
As I remember it uses only the polynomial counters, filters and ring modulation is not used, but Szipucsu can correct me, he created the music from Midi.You are right. Only 4bit distortion is used in Fred music. No filters, no ring modulation.
I collected some songs which uses special features of Dave, i did not find midi which uses Low Pass FilterYou are right, no low pass filter.
Somebody knows how the basic command "wait delay" gets its timings?As i see from debugger, it uses the 1 Hz interrupt for WAIT DELAY x, where x is delay value in seconds.
what player and extension do i need for playing?From Midi tools package (https://enterpriseforever.com/letoltesek-downloads/enterprise-software/?action=dlattach;attach=25293) you need MIDIDISP.COM to play EPM files FILE system extension is also needed, but i think you uses a ROM config which contains it.
From Midi tools package (https://enterpriseforever.com/letoltesek-downloads/enterprise-software/?action=dlattach;attach=25293) you need MIDIDISP.COM to play EPM files FILE system extension is also needed, but i think you uses a ROM config which contains it.
I created a snapshot for Low Pass filter example, it gives good aircraft sound :D
port settings:
0a4h: 1ch
0a5h: 00h
0a6h: 20h
0abh: 1fh
how do yo load this on the ep?There are more method, i used the BASIC CODE command to insert small binary code, both file will give the same result, 1st was saved as text, 2nd in tokenized format.
in the fred ingame, there is a sound like an acoustic bass. how is this done?It is simply 4bit distortion (SOUND STYLE 16,SOURCE x in IS-BASIC, where x can be 0, 1 or 2).
Yesterday i could not attend on the live show, I did not see the short notice :)
Congratulation Rampa, Dave sounded great in the video, Fred was perfect, as i see sometimes still only 2 channels are initialized for digi play :)
I was surprised on MODPLAY, because the screen were blank, at left bottom were there screen of real EP?
The screen should be in text mode, and display mod specific stuff.
The 17bits PN can be used on the a,b and c channels. but i dont understand how its done... only swapping the pn7 and pn17 on the noise channel affects the other channels? and how the 9,11 and 13 bit PN are selected? on the noise channel?
Here you can find an extended Dave documentation with IstvánV's extra information, unfortunately it is hungarian, but i hope google translate will give a readable result:
http://www.ep128.hu/Ep_Konyv/Exos.htm#240
as i see:
7 bit PN (selected on tone channel) can be changed to 17/15/11/9 bit PN (specified on port 0a6h)
and now i understand why 7 bit PN selected on a tone channel and setting 10h to 0a6h gives noise, because noise channel is a 17 bit PN at 31KHz this generate pseudo white noise, and by this setting we set 17 bit PN to the tone channel, and it's frequency can be changed, not fix like on noise channel.
4,5 bit PN's are valid only on tone channels.
if bit 4 of 0a6h is not set then tone channels uses the 7bit PN, and noise channel uses the 17/15/11/9 bit PN based on bit3 and bit2 setting of 0a6h, if bit4 is set on 0a6h then tone channels uses the 17/15/11/9 bit PN based on bit3 and bit2 setting of 0a6h and in this case it's clock will be 250KHz and noise channel uses 7 bit PN on the noise channel clock (31,25 kHz) or selected tone channel clock by bit1 and bit0 of 0a6h.
Length of PN series: 2^N-1 (it can not be 0, it would cause forever loop with 0 (0 XOR 0 = 0))
the first load, in the records screen. only two channels. after the ingame, the records screen has the 4 channels.....I got 2 ideas:
may be the problem is not in the audio?
I got 2 ideas:
1st z80 timing is not perfect, and this cause sometimes we have 4 channels ,and sometimes 2, because the Dave initialization routine uses z80 instructions in wait loop.
2nd initialization routine resets the oscillators by ld a,07h out (0a7h), a (to zero phase and output state) and this does not happens on FPGA.
But i think it is not a major issue, since sometimes it is good, and sometimes it is not. Do we have a sequence? ex every 2nd is good? Or is it total random?
I got 2 ideas:
1st z80 timing is not perfect, and this cause sometimes we have 4 channels ,and sometimes 2, because the Dave initialization routine uses z80 instructions in wait loop.
2nd initialization routine resets the oscillators by ld a,07h out (0a7h), a (to zero phase and output state) and this does not happens on FPGA.
But i think it is not a major issue, since sometimes it is good, and sometimes it is not. Do we have a sequence? ex every 2nd is good? Or is it total random?
Do you also simulated the shadow of I/O ports?
10-13H mirrored at 14-17H, and also used by EXDOS.
If you using EXDOS 1.4, theres is my WD check routine at the start, testing register mirrorings for WD presence. Original EXDOS freeze without WD. Then I added WD check, and the new Controller not ready error, then EXDOS 1.4 can be used without floppy hardware, for example SD only system.
This is my test routine:Code: ZiLOG Z80 Assembler
WDCHECK: LD A,55H OUT (11H),A LD A,0AAH OUT (12H),A PUSH BC PUSH BC POP BC POP BC IN A,(15H) CP 55H RET NZ IN A,(16H) CP 0AAH RET NZ LD A,0AAH OUT (11H),A LD A,55H OUT (12H),A PUSH BC PUSH BC POP BC POP BC IN A,(15H) CP 0AAH RET NZ IN A,(16H) CP 55H RET
now struggling with "not a dos disk"This means: reading boot sector successfully, but the readed data not a valid FAT boot sector.
This means: reading boot sector successfully, but the readed data not a valid FAT boot sector.
I suggest use EPDOS Disk Editor (http://www.ep128.hu/Ep_Util/Pic/EPDOS_2.gif), for easy view what readed.
After enter EPDOS, press Abort on disk error, navigate to the D-EDIT, start it, Abort on disk error, press CTRL+F8 for switch Track/Sector mode.
ALT+Up/Down track change, ALT+Left/Right sector change, CTRL+Left/Right side change.
I don't know what happened there, and sorry the tabs size is mixed up but hopefully it is usable. Ignore the bit at the end that says ". str_ireplace(' [ Attachment Invalid Or Does Not Exist ] '" I did not add that, the "system" did! :lol:It is a forum bug :oops:
In the real hardware, each time i change unit (from A: to B:) the ep ask me to put a disk in the drive (there is a floppy in the drive) but the FPGA simply try to read the drive. Also, i only have one drive, but the fpga try to access inexistent drives. How it detect the drives?It does a WD1770 "Restore" command, waits for the WD to become non-busy in the status resgister (bit 0 == 0), and then looks at bit 2 of the status register, which should be 0 if the drive head is now at track 0.
Still in the same point...Just a thought... are you using a FPGA Z80? If you are, does the IN A,(C) instruction set the flags? The code I posted earlier relies on this but it is probably not the most frequently used Z80 feature!
Just a thought... are you using a FPGA Z80? If you are, does the IN A,(C) instruction set the flags? The code I posted earlier relies on this but it is probably not the most frequently used Z80 feature!
Thank you again :)As i understand, when sync bit set, it stops immediately the counter of the channel, and the counter is hold ony frequency value which is set by it's belonging tone registers (a0h-a5h)
Then...
If sync is 1 the counter of belonging channel is not running? Also in the middle of the count? Or only at the end?
Flip-flip of tone generator output is set to 0 at the end of the count?
I have to read the last paragraph carefully :)
Hi!I have sent you an invitation to the repo.
I noticed this core was not ported to MiST. I would try to do it, but can you open the source? Or just share with me on GitHub (I won't publish it if you don't want, I promise). BTW, I'm sure it's using some of my code, too, like the improved T80.
Hi!
I noticed this core was not ported to MiST. I would try to do it, but can you open the source? Or just share with me on GitHub (I won't publish it if you don't want, I promise). BTW, I'm sure it's using some of my code, too, like the improved T80.
AFAIK only shared video memory is contended.Yes, only Video RAM is contended, others are not.
(Sorry, I have explained Ron that Zozo is working on the SF3 driver and Bruce Tanner on EXDOS3.0)Yes, most of work on EXDOS 3 done by Bruce. But now my previous EXDOS fixes and enhancements are officially included in the code.
I suggest to try DRVTEST (https://enterpriseforever.com/programming/drvtest-1780/msg78152/#msg78152) for testing all signals.
Anyway, on real machines the FORMAT say not ready when problem with Index pulses. Drive with faulty Index signal can Sector Read/Write, but fail at FORMAT.
When executing Step/Seek/Restore commands, motor also will turn on, and drive become ready?
Format firstly do SD/DD check. Do 50 STEPIN then counting how many STEPOUT needed for a Track 00. Also report Not Ready if still no Track 00 after 256 STEPOUT.
not on restore, should it?Yes.
and the ready signal is on. may be it is too short? cannot see changes on DRVTEST on pin 2 and 34 (always blue)I will try make video on a real machine for see signal changes.
cannot see changes on DRVTEST on pin 2 and 34 (always blue)Probably there are the problem. The default state of these are RED.
Probably there are the problem. The default state of these are RED.
Video of Ready signal operation. (https://drive.google.com/file/d/1qx_YqSY8rDo8kwDwz9Te10OPQX1l282V/view?usp=sharing) (Note in this video the 2 constant blue because the 1.2M drive forced to 300rpm mode by Pin2 soldered to GND).
The firstly test Read Address command in DRVTEST.
Needed display data, and got a OK.
If head at wrong position the different data marked as red.
(Attachment Link) (Attachment Link)
Then test Read/Write Track. Put EPDOS 1.x ROM to your configuration, start it and enter to DISK EDITOR.
Switch to TRACK EDITOR mode.
Track readed, usually got a Data error, because now all data handled as raw data, including CRC bytes. Don't care about it :-)
(Attachment)
Then make a new FORMAT template to buffer, for example with FORMA9. Then press WRITE. It is needed to be completed without error.
(Attachment)
Similar, but "sector not found" instead of "data error" and if i write the track.... Not ready.....Ok, now we know why not works the FORMAT :ds_icon_cheesygrin:
Ok, now we know why not works the FORMAT :ds_icon_cheesygrin:
Then look about your track command emulations. Are these implemented at all?
In ep128emu Read Track not implemented, but this is not too important.
At Write Track, it is gather the sector addresses and sector data fields from the raw track byte stream and write the data for the right sector in the disk image.
Then formating will work, just you can't use different format than the existing format of disk image format. For example you can format 720K disk to 720K, but can't to 800K.
looking close at your screens, your home command, changes sector to 2..... Mine to 0..... :-(0 are wrong value, because the sectors numbered from 1... :oops:
0 are wrong value, because the sectors numbered from 1... :oops:
The current value are "random", it is return with a firstly found sector header, soo depending the current disk position while rotating. But with 720K disks need it from 1 to 9.
On a non rotating disk images :lol: practicaly will be 1 the first, if more addresses readed, then 1,2,3... until max sector, then start again from 1.
Anyway the Track and Head fields are the most important data. Head used for a check for single sided drive at Format. And also when read disk information: if it is two sided disk, check for one head drive, and report Incompatible disk if this is the situation.
Also at disk check do some Step In, and read address and verify Track number. If it is right, then nothing to do.
If it is 1/2 value, then 40 track disk in 80 track drive needed to use double stepping.
And if 2x value the 80 track disk in 40 track drive, report Incompatible disk error.
So it is OK to return 1 as sector....
What EPDOS is doing just after ALT F8? only a small flash on the drive led and "sector not found"
is EPDOS looking at CRC value? (not sending CRC... but never needed it.)
Thanks very much to everybody. Disk controller is working ok now....Great!
After spending a reasonable time, I have been able to test the Enterprise core on several fpga boards such as: ZXuno, N-Go ( ZXNext), MiSTer, NeptUNO, MiSTica and SiDi.Reading that the second ZX Spectrum NEXT batch is about to start being manufactured reminded me that there were attempts running the Enterprise FPGA core on NEXTs or N-GOs. Are there any news about that?
Now when the full machine working right in FPGA...
Possible to put FPGA core of Nick and Dave to any FPGA chip, and produce replacement chips which can be installed to real chips place? Repair dead machines.
Wolf? WOW! :shock:Just a demo version :D (https://www.youtube.com/watch?v=EePP2jNzSs8)
Just a demo versionProbably I should add your channel to the monitoring list after all.
Probably I should add your channel to the monitoring list after all.I do not think is necessary, i do not think i will upload more videos :-D
my physical Enterprise machines are slowly dying off because of various issuesWhat happened to your machines?
What happened to your machines?
Kyp has finished his Enterprise core for the MISTer FPGA. Those of you that own such FPGA can download from here (https://github.com/Kyp069/ep).