What a good clue!

But, who is Jefrey?

I would love to have one of these MIDI interfaces, but the cartridge bay is better populated with a good SD-reader.

Cartridges also have the disadvantage that they do not support I/O ports. Memory mapped I/O is more problematic to emulate (unless it is somehow hacked into the existing SD card interface), and it would be slower to read in a modified version of midiplay, because paging needs to be saved, changed and restored in a high frequency IRQ handler. Assuming it is based on the 6850, input could be implemented better if the interface supported generating interrupts, otherwise the 6850 needs to be polled at a fixed high frequency, which does work, but uses more CPU time. With a VHDL implementation of the 6850, a minor optimization would be possible by making the data register return FFh when no new data byte is available.

I need to check for more details, but the ROM is on segments 6 and 7, and the 6850 ACIA is mapped to 3FF8-3FF9h on segment 7. It would be easy to change how and where the MIDI hardware is accessed, because it is only a few lines of code in the ROM. Initialization:
07:BFF8 is the status/control register, and it is set to 1/64 clock (baud rate should be 31250 for standard MIDI, so 2 MHz input to the ACIA?) and 10 bits format (start bit + 8 data bits + stop bit, no parity).
Sending one byte:
07:BFF9 is the send/receive data register. Bit 1 of the status register is high when data is ready to be sent. I did not find more MIDI hardware related code, so it looks like Scoretrack does not support input (recording or real time play on a keyboard).

Cartridges also have the disadvantage that they do not support I/O ports. Memory mapped I/O is more problematic to emulate (unless it is somehow hacked into the existing SD card interface), and it would be slower to read in a modified version of midiplay, because paging needs to be saved, changed and restored in a high frequency IRQ handler. Assuming it is based on the 6850, input could be implemented better if the interface supported generating interrupts, otherwise the 6850 needs to be polled at a fixed high frequency, which does work, but uses more CPU time. With a VHDL implementation of the 6850, a minor optimization would be possible by making the data register return FFh when no new data byte is available.

I think like you, better an external expansion card. We have all necessary signals there. And bus expanders are cheap to build.

On the MSX approach they seem to connect the MC6850 /IRQ pin 7 to Z80 /INT, but then, who knows the origin of the interrupt?. I think that what is needed is to implement another read-only port for the interrupt status.

Does anyone have a photo of the bottom side of the interface PCB ?

Thanks
Do you have a photo of the top side with removed ROM ?

Would it be possible to borrow this interface ?
I'm trying to recreate the scheme.
There are terribly many vias

Nice! This is in Eagle? Can you send the file? I will add the remaining wires.