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Author Topic: EnterMice (Joy & PS/2 mouse interface) (Read 73703 times)

Offline lgb

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Re: EnterMice (Joy & PS/2 mouse interface)
« Reply #180 on: 2015.September.01. 00:28:53 »
VHDL at least on the forum :)  I try (hmm tried?) to learn it. Forgive me my stupidness, but ... Wouldn't it be more simple to use the given "line" of the logic vector "KB", instead of creating KB0...9 signals which is more or less the same but redundant? What I mean, instead of this:

Code: VHDL
  1. KB_J    <=      (KB5 or J2_Fire1) and                                           -- Joystick 2
  2.                 (KB6 or J2_Up) and
  3.                 (KB7 or J2_Down) and

leave all the select stuff, and write this:

Code: VHDL
  1. KB_J    <=      (KB(5) or J2_Fire1) and                                         -- Joystick 2
  2.                 (KB(6) or J2_Up) and
  3.                 (KB(7) or J2_Down) and

I only ask this, since I would like to understand this piece of VHDL, and it was not understandable for me at least. Sorry for  the beginner-VHDL question.

Also, what is odd for me: because VHDL being a (hardware) description language and not a programming language, it is not "executed" line by line but all stuffs "in parallel", thus the exact order of 'statements' are not even important (order in the VHDL source I mean, they can be even reversed, no change on the synthesized bitstream too much, I guess). I have a suspect that you may created some kind of logical hazard, because of this behaviour. You can change this if you skip the "intermediate" signals which are not so important here I guess, or having a "process block", so you can 'sense' the level change of one or more signals first, and depends on that for the "evaluation" of the process block. Or so.

Again, these are my absolute beginner VHDL tips (I haven't even written anything in VHDL yet, just read some tutorials and e-books on the topic ...), so please point out if I am wrong somewhere, it would help me. Thanks!
« Last Edit: 2015.September.01. 00:54:14 by lgb »

Online gflorez

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Re: EnterMice (Joy & PS/2 mouse interface)
« Reply #181 on: 2015.September.01. 01:09:24 »
I too had ramdom errors with some optocouplers on my adapter. One chip worked, but  exactly the same other didn't:


https://enterpriseforever.com/hardware/re-paintbox-mouse-xr/msg45493/#msg45493.


Also the errors persisted more  on the Up and Down switches than  on the other four(Left, Right, Lbutton and Rbutton).

Offline pear

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Re: EnterMice (Joy & PS/2 mouse interface)
« Reply #182 on: 2015.September.01. 07:29:42 »
Wouldn't it be more simple to use the given "line" of the logic vector "KB", instead of creating KB0...9 signals which is more or less the same but redundant? What I mean, instead of this:

Code: VHDL
  1. KB_J    <=      (KB5 or J2_Fire1) and                   -- Joystick 2
  2.                 (KB6 or J2_Up) and
  3.                 (KB7 or J2_Down) and

leave all the select stuff, and write this:

Code: VHDL
  1. KB_J    <=      (KB(5) or J2_Fire1) and                 -- Joystick 2
  2.                 (KB(6) or J2_Up) and
  3.                 (KB(7) or J2_Down) and
Yes, you're right. And so it was in the first version.
But I decided to protect themselves in case the LS145 decoder inside the EP was damaged.
Therefore, additional signals KB0 .. KB9 defined on the basis of all the line KB.
Code: VHDL
  1. with KB select
  2.         KB0 <= '0' when "1111111110",
  3.                  '1' when others;      
Also, what is odd for me: because VHDL being a (hardware) description language and not a programming language, it is not "executed" line by line but all stuffs "in parallel", thus the exact order of 'statements' are not even important (order in the VHDL source I mean, they can be even reversed, no change on the synthesized bitstream too much, I guess). I have a suspect that you may created some kind of logical hazard, because of this behaviour. You can change this if you skip the "intermediate" signals which are not so important here I guess, or having a "process block", so you can 'sense' the level change of one or more signals first, and depends on that for the "evaluation" of the process block. Or so.
This is a simple combinatorial logic. Hazards are unlikely.
Yes, operations are performed by hardware in parallel (with an accuracy of the propagation time of signals).
Timing Report shows propagation of signals with differences of 1 ns.

But I came up with the idea that maybe there is a problem with the pull-up resistors.
All signal lines KB, Joy Mouse is pulled up to VCC.
I'll check this option, and maybe someone else finds an error in VHDL.
« Last Edit: 2015.September.01. 08:20:43 by pear »

Offline pear

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Re: EnterMice (Joy & PS/2 mouse interface)
« Reply #183 on: 2015.September.01. 07:31:14 »
I too had ramdom errors with some optocouplers on my adapter. One chip worked, but  exactly the same other didn't:
https://enterpriseforever.com/hardware/re-paintbox-mouse-xr/msg45493/#msg45493.
Also the errors persisted more  on the Up and Down switches than  on the other four(Left, Right, Lbutton and Rbutton).
The error is only on this one, the only combination of signals (KB9, Joy2_Right).
All the rest is correct.

Offline lgb

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Re: EnterMice (Joy & PS/2 mouse interface)
« Reply #184 on: 2015.September.01. 09:19:22 »
Yes, you're right. And so it was in the first version.
But I decided to protect themselves in case the LS145 decoder inside the EP was damaged.
Therefore, additional signals KB0 .. KB9 defined on the basis of all the line KB.

Hmm, maybe I dumb, but I still don't understand this clearly.

Code: VHDL
  1. KB : in  STD_LOGIC_VECTOR (9 downto 0);

So you have the KB stuff here. Then lines like this:

Code: VHDL
  1. signal KB0 : STD_LOGIC;
  2. ...
  3. with KB select
  4.                 KB0 <= '0' when "1111111110",
  5.                                  '1' when others;

Actually "copy" the exact signals from KB logic vector to KB0 ... KB9, so in my opinion eg using KB5 or KB(5) is about the same (well not the very same, since it has some short time of propagation delay, as far as I can guess). I thought the difference can be, if you want to implement a demultiplexer in VHDL that is the KB logic vector is "4 line wide" only and you create your internally used signals from 0 ... 9. But what you do here seems not to be this, but an exact (in my opinion unneeded) copy from KB(9 downto 0) to KB9...KB0 actually.

Quote
This is a simple combinatorial logic. Hazards are unlikely.

What I meant (but again, I can be wrong easily, my comments here are more about me to learn VHDL hehe) with a simplified example:

Code: VHDL
  1. KB5 <= '1';
  2. KB_J    <= KB5;

Actually, as far as I know this may not work at all. At least not in a way one would expect. Because with a programming language background some can expect that KB5 has been assigned with a value of logic level 1, then assign KB_J with KB5 which should be '1' then, since the first line was earlier (in the meaning of "sequence" in a programming language). But actually this does not mean anything in VHDL, as the two lines are "executed" in parallel, thus you can't be sure the second line will "see" the already set up value of KB5 or the original, from the point of view of VHDL you can even exchange the two lines above and it will mean still the same. Again, that is _my_ idea about VHDL. So about "hazard" I mean about the situation that you set KB5 and signals with the similar names and you use them then, but the order of "logic evaluation" can be wrong here. You may even see the previous state of the signal instead of what you have expected, as KB5 is not "filled" with the value from the KB std logic vector yet when it's used. What I would do is to put a "process" block to "sense" level change of KB5 and similar signals for the J,K etc process. I am not sure if it's even understandable at all, what I want to say :)

Quote
Yes, operations are performed by hardware in parallel (with an accuracy of the propagation time of signals).
Timing Report shows propagation of signals with differences of 1 ns.

I see, I have not experience at all with this, that's true, since I "know" a very little VHDL just by learning and without actually trying/using it :) Since the lack of any hardware I can program (FPGA what I would like to play with, not so much a CPLD, but that's another question).

Well, I can't stop repeating that it's more like a "me trying to understand VHDL" and not a critical view on your work, please do not misunderstand me. I would like to understand this only, but if it looks like off-topic or annoying for you, then I shut up :D :D Thanks!
« Last Edit: 2015.September.01. 09:23:17 by lgb »

Offline pear

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Re: EnterMice (Joy & PS/2 mouse interface)
« Reply #185 on: 2015.September.01. 10:03:39 »
Maybe something we learn by asking each other questions ;)

VHDL is a little strange when it comes to writing of expressions order.
Now, the order is completely arbitrary.
Entry
Code: VHDL
  1.     KB5 <= '1';
  2.     KB_J    <= KB5;
  3.  
is the equivalent to
Code: VHDL
  1.     KB_J    <= KB5;
  2.     KB5 <= '1';
  3.  
The only error in the above example, you assign a value for the KB5, which is previously defined as input.

But KB(0) is not the same as KB0.
Signal KB(0) is only one line.
Entry
Code: VHDL
  1. with KB select
  2.    KB0 <= '0' when "1111111110",
  3.              '1' when others;
is the equivalent to
Code: VHDL
  1. KB0 <= KB(0) or not ( KB(1) and KB(2) and KB(3) and KB(4) and KB(5) and KB(6) and KB(7) and KB(8) and KB(9) );
  2.  
« Last Edit: 2015.September.01. 10:12:26 by pear »

Offline lgb

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Re: EnterMice (Joy & PS/2 mouse interface)
« Reply #186 on: 2015.September.01. 10:09:56 »
Maybe something we learn by asking each other questions ;)

Well, yes, I am happy if you don't misunderstand (the intent of) my long posts with slightly off-topic contents :)

Quote
VHDL is a little strange when it comes to writing of expressions order. Now, the order is completely arbitrary.

Yes, so at least I know that well, hehe :) Thanks.

Quote
The only error in the above example, you assign a value for the KB5, which is previously defined as input.

Yes, my example was more like a generic statement but indeed using the same symbols you used created an awkward situation, I should use another names. :)

I would love to dig into VHDL with some kind of FGPA board, if I have only money for a dev board to start it :) Not so much CPLD related topic then, indeed.

Offline pear

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Re: EnterMice (Joy & PS/2 mouse interface)
« Reply #187 on: 2015.September.01. 10:39:48 »
Yes, my example was more like a generic statement but indeed using the same symbols you used created an awkward situation, I should use another names. :)
Well, it's perhaps no error. KB5 is not an input (KB<5> is), only the variable, so you can assign a value.
I just learned something :)

Offline lgb

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Re: EnterMice (Joy & PS/2 mouse interface)
« Reply #188 on: 2015.September.01. 10:42:21 »
Quote
But KB(0) is not the same as KB0.
Signal KB(0) is only one line.

Hmm, I feel lost. Yes, KB(0) is the 0th line of the 10-line width logic vector. But KB0 is also one line, as it is declared as signal and not signal vector. What I miss here? :(

Quote
Entry
Code: VHDL
  1. with KB select
  2.    KB0 <= '0' when "1111111110",
  3.              '1' when others;
is the equivalent to
Code: VHDL
  1. KB0 <= KB(0) or not ( KB(1) and KB(2) and KB(3) and KB(4) and KB(5) and KB(6) and KB(7) and KB(8) and KB(9) );
  2.  

Hmm. I see, but the KB as logic vector can be only one line as active (well, if I understand correctly, low-level active in our case) as the demultiplexer in the EP decodes in a way that it's not possible that two or more lines can be active, only one (or none). .... Or I miss something again :)

Offline pear

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Re: EnterMice (Joy & PS/2 mouse interface)
« Reply #189 on: 2015.September.01. 10:46:02 »
Hmm. I see, but the KB as logic vector can be only one line as active (well, if I understand correctly, low-level active in our case) as the demultiplexer in the EP decodes in a way that it's not possible that two or more lines can be active, only one (or none). .... Or I miss something again :)
Yes, you're right again, but only if decoder is undamaged.
And that is why these declarations, to eliminate internal LS145 decoder as the cause of the problem.

Offline lgb

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Re: EnterMice (Joy & PS/2 mouse interface)
« Reply #190 on: 2015.September.01. 10:46:56 »
Yes, you're right again, but only if decoder is undamaged.
And that is why these declarations, to eliminate internal LS145 decoder as the cause of the problem.

Ah, I see. :) Thanks! I'm kinda happy that my VHDL knowledge is barely enough now to understand basic things, hehe :)

Offline pear

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Re: EnterMice (Joy & PS/2 mouse interface)
« Reply #191 on: 2015.September.01. 19:59:48 »
The old rule says, "Do not fix what is not broken".
The problem is not the circuit, PCB, short circuits, VHDL, neither damaged parts.
The problem is ... the IS-BASIC.
Below the program, which served me for testing PLD.
Code: Text
  1. 100 PRINT AT 4,10:"J  K  L"
  2. 110 FOR N=0 TO 1
  3. 120   FOR I=0 TO 9
  4. 130     OUT 181,I
  5. 140     LET M=IN(182)
  6. 150     LET V=MOD(M,8)
  7. 160     LET J=MOD(V,2)
  8. 170     LET L=INT(V/4)
  9. 180     LET K=INT((V-4*L-J)/2)
  10. 190     IF N=0 THEN PRINT AT 5+I,4:"*"
  11. 200     IF N=1 THEN PRINT AT 5+I,4:"."
  12. 210     PRINT AT 5+I,9:J;K;L
  13. 220   NEXT I
  14. 230 NEXT N
  15. 240 GOTO 110
I began to suspect that the instructions OUT and IN of BASIC do not what I expect or do something more than need.
I wrote a second test program.
Code: Text
  1.  10 CLEAR SCREEN
  2.  20 ALLOCATE 17
  3.  30 CODE TEST=HEX$("F3,C5,01,B5,00,ED,69,03,ED,68,26,00,ED,61,C1,FB,C9")
  4. 100 PRINT AT 4,10:"J  K  L"
  5. 110 FOR N=0 TO 1
  6. 120   FOR I=0 TO 9
  7. 140     LET M=USR(TEST,I)
  8. 150     LET V=MOD(M,8)
  9. 160     LET J=MOD(V,2)
  10. 170     LET L=INT(V/4)
  11. 180     LET K=INT((V-4*L-J)/2)
  12. 190     IF N=0 THEN PRINT AT 5+I,4:"*"
  13. 200     IF N=1 THEN PRINT AT 5+I,4:"."
  14. 210     PRINT AT 5+I,9:J;K;L
  15. 220   NEXT I
  16. 230 NEXT N
  17. 240 GOTO 110
This time I added a inset of code in assembler instead of suspect instructions.
Code: ASM
  1. F3          DI
  2. C5          PUSH    BC
  3. 01,B5,00    LD      BC,181
  4. ED,69       OUT     (C),L
  5. 03          INC     BC
  6. ED,68       IN      L,(C)
  7. 26,00       LD      H,0
  8. ED,61       OUT     (C),H
  9. C1          POP     BC
  10. FB          EI
  11. C9          RET
And now everything works. The signals are stable as a rock. There are no interferences.

Let me just explain to someone what is happening in the first program between lines 130 and 140 ?
I do not understand.
Do clue may be the STOP button internally attached to the line KB9 ?
Maybe instruction OUT 181,9 produces some additional processes in the Enterprise ?
« Last Edit: 2015.September.01. 20:04:45 by pear »

Online Zozosoft

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Re: EnterMice (Joy & PS/2 mouse interface)
« Reply #192 on: 2015.September.01. 20:24:25 »
The problem with the first program: EXOS IRQs are enabled, then the device drivers continously updating port values.

Brute force solution for BASIC program:
POKE 56,201 disable IRQ (place RET to the entry point)
POKE 56,245 enable IRQ

Offline pear

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Re: EnterMice (Joy & PS/2 mouse interface)
« Reply #193 on: 2015.September.01. 20:52:55 »
OK, but why only after OUT 181,9 ?
All other values ( 0..8 ) do not cause this behavior.

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Re: EnterMice (Joy & PS/2 mouse interface)
« Reply #194 on: 2015.September.01. 21:23:32 »
OK, but why only after OUT 181,9 ?
All other values ( 0..8 ) do not cause this behavior.
What happen with this?
120   FOR I=5 TO 9

Or:
120   FOR I=9 TO 0 STEP -1