Enterprise Forever
:UK => Hardware => Topic started by: Bagpuss22 on 2015.April.09. 13:51:07
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This is not an Enterprise issue as such but I wanted some advice on using DRAM.
I have a synth that has the facility to upgrade the sample memory with a card using
256k x 1bit DRAM, 12 of them. These IC's have a single write enable line (W) and
separate input and out bits (D) and (Q) which are tied together.
That seems simple enough.
I want to create a memory card that uses 256k x 4bits, 3 of them. These IC's have a
single write enable (WE) AND an output enable (OE) and the 4 bits are I/O ports.
So again this seems easy enough apart from the usage of the WE and OE. I have a single
write enable (W) coming in so my question is, does anyone have experience using these and
how do the (WE) and (OE) get derived from a single (W)?
My assumption so far is that the (W) will go to the (WE).
Russ
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I have just had a look at the schematics of the ZX Spectrum+3, as this uses
64k x 4bit and this seems to tie the Output Enable (OE) to ground......
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I have just had a look at the schematics of the ZX Spectrum+3, as this uses
64k x 4bit and this seems to tie the Output Enable (OE) to ground......
And look the Enterprise Modell 911 :-)
It is same.
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Thanks for that confirmation.
Will see how it goes.
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What about the refreshing scheme (9 bits vs 8 bits)?
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What about the refreshing scheme (9 bits vs 8 bits)?
Good point....
Just thinking out loud then, would it be better to use Static RAM?