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Author Topic: Enterprise Deployment Attempt Over FPGA. (Read 92396 times)

Offline SlashNet

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #300 on: 2023.May.17. 14:19:15 »
Just a demo version
Probably I should add your channel to the monitoring list after all.

Offline geco

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #301 on: 2023.May.17. 20:35:07 »
Probably I should add your channel to the monitoring list after all.
I do not think is necessary, i do not think i will upload more videos :-D

Offline Kyp

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #302 on: 2023.May.19. 18:53:28 »
I have just released the first official release for neptUNO FPGA and published the source files:
https://github.com/Kyp069/ep

Offline gflorez

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #303 on: 2023.May.19. 19:56:44 »
Yes, and a new Retrocrypta Twitch program is scheduled today:

« Last Edit: 2023.May.19. 20:02:46 by gflorez »

Offline neurox

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #304 on: 2023.June.26. 19:38:34 »
Where should I look for the latest core for the MiSTer FPGA? I'm running the 20220501 version I found on https://misterfpga.org/viewtopic.php?t=4645 - is that the latest one available? :-)

Thank you for pouring your time into this - it means a lot to an old Enterprise fan, and as my physical Enterprise machines are slowly dying off because of various issues, it's nice to know that the FPGAs will preserve it! :-)

Offline gflorez

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #305 on: 2023.June.27. 18:58:58 »
I have already notified Kyp your question, He will answer soon.

The Mister is property of sorgelig, so new EP core versions will mandatorily go through his approval. The Mister Main feature or drawback is its front-end and included Arm processor.

The developers of the EP core are the Spanish RW group, and they work on other easier FPGAs, like the Neptuno, without a special firmware or front-end.

Of course there are newer versions of the EP core, and they will slowly surface.

Offline gflorez

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #306 on: 2023.June.27. 19:18:18 »
Sorry, I have confused the Mist sorgelig's project with the Mister open project, sorry....

Better wait for Kyp...

Offline Kyp

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #307 on: 2023.June.29. 10:20:47 »
I'm half way through the MiSTer version but got stuck trying to use the SDRAM, apparently it's a bit special. I'll get back to it at some point.

Offline Zozosoft

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #308 on: 2023.June.29. 10:28:57 »
my physical Enterprise machines are slowly dying off because of various issues
What happened to your machines?
« Last Edit: 2023.June.29. 22:27:59 by szipucsu »

Offline Judge

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #309 on: 2023.July.04. 19:25:37 »
What happened to your machines?

I would be curious to know. It's gotten to the point where almost everything except the Nick chip and the Dave chip can be fixed on the Enterprise.
Üdv.Judge

Offline gflorez

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #310 on: 2023.November.02. 11:46:11 »
Kyp has finished his Enterprise core for the MISTer FPGA. Those of you that own such FPGA can download from here.

In the case you are interested on such devices but don't have a MISTer, don't run in a hurry to buy that expensive FPGA, the time has arrived that other better and cheaper alternatives are at hand, with capacity for bigger cores and better specifications. 

These new FPGA platforms are being actually designed by MANUFERHI with special petitions of the Core developers members of the Spanish RetroWiki FPGADEV team.

I will add more information on near future, but by now you can translate some Retrowiki web-page threads.

http://retrowiki.es/viewtopic.php?f=120&t=200039734&hilit=poseidon

http://retrowiki.es/viewtopic.php?f=121&t=200039702&hilit=sidi128


Offline Tuby128

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #311 on: 2023.November.11. 15:24:59 »
Kyp has finished his Enterprise core for the MISTer FPGA. Those of you that own such FPGA can download from here.

The custom chip NICK's HDL code is under:
EP/HDL/VIDEO.v
The DAVE (especially the audio part of it) is under:
EP/HDL/AUDIO.v

 The HDL language which used is called "Verilog".


Offline gflorez

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Re: Enterprise Deployment Attempt Over FPGA.
« Reply #312 on: 2023.November.11. 21:11:07 »
Ok, but this core still needs more development to behave exactly like Nick and Dave.

Also, I already explained that having a "silly box" that behaves like the Enterprise, this not means we have a Verilog description of all the signals and their correspondence with the chip pins to then be able transplant a clone to the EP. There is still a long path to achieve that.