Thanks ergoGnomik.

Yes, there are invaluable documents on Zozo's page. I hope that the geniuses on the project could translate all that little boxes on the design.

The sheets seem to be modified on some parts. If they are effectively the latests revisions E and D(the fixed NICK?), maybe they will lead to a good implementation of the chips.

Greetings to all users and lovers of the Elan Enterprise.
The main objective is to achieve an Enterprise 128 implementation that works on FPGA boards like MiST, MiSTica and SiDi and so that later FPGAs like the MiSTer can be ported.

Hi ron!

We also had such a plan two months ago, but due to lack of money and specialist, we gave it up ...
So, yours is the "track", if we can help you with anything, let me know!
We have a Hungarian Enterprise Club community behind us. You can count on us!

Hi there, fellows !

We have some progress, much more than we could expect. Our friend rampa069 has not given us time nor to assimilate all that he has already managed to do. Amazing !

Because the FPGA's SDRAM has 24 addressing bits, rampa069 has successfully reduced the Enterprise MMU in a very smart way. First 8 bits (Content of the port pointed to by the two high lines as a bank) +2 bits (The active port (B0, B1, B2, B3)) + 14 low bits of the address bus..., as soon as a Pseudo_NICK can start painting, there are a lot of possibilities that it will start working right away.

So, Kyp is redoing the control signals but since kyp uses a 28MHz master clock,  with clock enables it is more messy. There are a lot of clocks out of combinatorics and that doesn't like the FPGA. The advantage of FPGA implementations is that as milestones are achieved, you can start testing.

Now ROM loads OK, just using a EP128.ROM file at SD's root in where you can concatenate all ROMS you want. It loads from SD at address 0.-

Also the disc controller is working.

[ Guests cannot view attachments ]
[ Guests cannot view attachments ]

Surely tonight ramp069 will enable the Git and all the part already converted to EP128 will be deployed. More or less these are the news we have, it seems that everything is going faster than expected.



Best Regards
ron

... and pseudo-Nick started painting.
[ Guests cannot view attachments ]

Some other documents which were not mentioned previously:
http://enterprise.iko.hu/technical/NICK-Old-VDC-ELITE-description.pdf
http://enterprise.iko.hu/technical/NICK-Internal-timing-of-VDC-Elite.pdf

Another important thing: clocks calculations by IstvanV

Great! Thanks Zozo.

[ Guests cannot view attachments ]

@Kyp:

"No solo se ve, está 'procesando' la LPT, leyéndola de la RAM. En esa imagen están las dos bandas del borde superior e inferior, 28 bandas en modo CH128 (cambiando el puntero a donde empieza el texto) y las dos bandas en modo VSYNC para el sincronismo vertical "

----

"It not only sees, it is 'processing' the LPT, reading it from Ram. In  this image there are the two bands, upper and lower, 28 bands in CH128 mode (modifying the pointer where starts the text) and the two bands on VSYNC mode for the vertical synchronism "