I will not do more this year
The checklist:
Clock segment
* divider mod 2 done
* divider mod 3 done
* divider mod 4 done
* divider mod 5 done
* divider mod 12 done
* clock mux 8/1 done
* clock selector with phase synchronizer done
* control circuit
* display
* management firmware
* address decoder done

RTC segment
* battery backup (clock settings & ROM pages config)
* double buffer for local access
* address decoder done

ROM segment
* address decoder with configurable memory pages done

RAM segment
* address decoder done

Buzzer or speaker. I have not decided yet.

The wiki page has been started.

Do not rush. For now, there will be frequent changes.
I set up a page to remember what is already ready and what else to do.

RTC with NVRAM will be shared between EP and the card microcontroller.
Each write from EP to RTC will be cause a set the flag RTC_DATA_CHG for microcontroller.
The uC then issues a RTC access request (RTC_REQUEST) and waits until the EP finishes access to the RTC.
When RTC is available, the uC takes over and blocks access for the time of reading new data.
After completing the reading, it releases access and resets the flag.
I do not know how it will works in reality. I expect some conflicts in access. We'll see.

I'm also wondering about the flag for EP that it has signal new data to read.
At now I do not have an idea how to do it easiest.
Maybe some fake read-only register for polling ?

Certainly, the identification of the presence of the card will be useful.
I'll think about that.

Good idea!

The original RTC card for EP uses the Motorola interface mode.
In the DTC (Dream Turbo Card) I used a processor with Intel architecture.
Thanks to the use of several tricks, I managed to connect to RTC in Motorola mode, at the same time speeding up communication 2-3 times.
The address and data are transferred using one MOVX instruction (two cycles of the processor)

I have already used practically all available CPLD resources:
Macrocells Used 130/144  (91%)
Pterms Used 453/720  (63%)
Registers Used 96/144  (67%)
Pins Used 80/81  (99%)
Function Block Inputs Used 258/432  (60%)