Yes, of course. It depends on which solution, single OTP FPGA or FPGA+MCU+Flash, meets board-space constraints better.
It was not by a mistake that I didn't mention custom ASIC at all, I too heard about the magnitude of cost of such solutions. And I explicitly mentioned that OTP FPGAs can be considered only when it is sure that the design is complete and free of error up to a generally usable level. Meanwhile I also found this.
I see. Then it is my fault that I haven't even heard about OTP FPGAs, nice to know. Looks interesting, thanks. However I feel, that it's more important than to do the right think, and no need later for "firmware upgrade" as it's wouldn't be possible then
Of course the same is true for ASICs as well. These FPGAs are not so "big" at the other hand, I have no idea what can be the smallest synthesized Z80 in term of logic cells, gates (it's not the same as the "transistor count" of a real Z80 of course, the situattion is bit different), or whatever.
Actually an FPGA implemented Z80 can be useful for some "scary" things, ie to provide RAM expansion right at the "CPU FPGA board" level. Since EP128 only "shares" the VRAM and other RAM is accessed only by the CPU, you can have all the RAM other than VRAM private to the CPU (though then you must "cache" writing of 0xB0..0xB3 I/O ports to have your own idea how segment/page "mapping" should be done). Maybe that's an odd idea, but with this, in theory it's possible to get insane CPU performance when only the "normal" RAM is needed, and "slowing down" is only needed if external I/O ports OR memory (I mean VRAM here now) access is needed (and still you can have an internal "shadow copy" of VRAM and serve _read_ requests by CPU from there on full speed, and only slow down on writes). Of course only, if it makes sense, ie it can give faster RAM than through the rest of the machine. Basically AFAIK (!!!) SuperCPU for Commodore 64 works like this: if its internal memory expansion is referred it can go near to 20MHz (?) and only there are problems when the "legacy" memory is needed to be accessed within the C64 (but SCPU is a complex topic, it uses tricky caching etc to try to reduce the number of these cases).
it's another question if it makes sense at all, or again, I have quite insane and "too futuristic" ideas, especially of kind, I wouldn't be able to realize either
Also, even if it's sane idea for somebody, these theory should be made optional, since these ideas mess up the timing some software expects, or anything ... I just thought, if C64 (and C128 too) can have SCPU, why not having something similar for EP (though the idea is not very same, as SCPU uses a "real" 65816 CPU, and we talk here about the FPGA realization of a Z80 or something like that at least). Anyway, I like to dream
Greatings from the wanabe FPGA expert (so in English: not at all expert)
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