Welcome, Guest. Please login or register.


Author Topic: External colour tests (Read 4613 times)

Online gflorez

  • EP addict
  • *
  • Posts: 2624
  • Country: es
  • OS:
  • Windows XP Windows XP
  • Browser:
  • Firefox 52.0 Firefox 52.0
    • View Profile
Re: External colour tests
« Reply #30 on: 2018.July.26. 12:28:46 »
The colour input signals go from 0 to +5v, so my friend thinks that five diodes on every video source will be enough. But I haven't still proved it.

I can explain you the system used if you want to test it this summer...

Offline pear

  • EP lover
  • *
  • Posts: 778
  • Country: pl
  • Z80 only
  • OS:
  • Windows NT 6.3 Windows NT 6.3
  • Browser:
  • Firefox 61.0 Firefox 61.0
    • View Profile
Re: External colour tests
« Reply #31 on: 2018.July.26. 12:38:15 »
I understand the principle of operation.
I organize myself a test environment.

You tested the display of a fixed image.
At the beginning I have to solve the problem of changing the memory content of the image to be displayed.
For now I have an idea for a dual-port RAM, but I hope that it will be simplified.

Online gflorez

  • EP addict
  • *
  • Posts: 2624
  • Country: es
  • OS:
  • Windows XP Windows XP
  • Browser:
  • Firefox 52.0 Firefox 52.0
    • View Profile
Re: External colour tests
« Reply #32 on: 2018.July.26. 13:38:12 »
Yes, my friend Habi implemented a little Rom inside the FPGA. But creating a Ram is the same procedure, and I think that you don't need dual port if it is the FPGA itself who modifies the content between synchronising signals.

Offline pear

  • EP lover
  • *
  • Posts: 778
  • Country: pl
  • Z80 only
  • OS:
  • Windows NT 6.3 Windows NT 6.3
  • Browser:
  • Firefox 61.0 Firefox 61.0
    • View Profile
Re: External colour tests
« Reply #33 on: 2018.July.26. 13:56:46 »
I have a lot of CPLD chips.
I'll try to use it instead of FPGA, but I'll need to use external RAM memory.

Online gflorez

  • EP addict
  • *
  • Posts: 2624
  • Country: es
  • OS:
  • Windows XP Windows XP
  • Browser:
  • Firefox 52.0 Firefox 52.0
    • View Profile
Re: External colour tests
« Reply #34 on: 2018.July.26. 15:51:25 »
This Spartan6 FPGA board cost only 17 Euro, post included. But you have to wait a month....

Offline pear

  • EP lover
  • *
  • Posts: 778
  • Country: pl
  • Z80 only
  • OS:
  • Windows 7/Server 2008 R2 Windows 7/Server 2008 R2
  • Browser:
  • Firefox 61.0 Firefox 61.0
    • View Profile
Re: External colour tests
« Reply #35 on: 2018.July.26. 16:12:51 »
The FPGA chip needs an external ROM for configuration.
Two chips on the PCB are still needed.
But the Spartan6 is not compatible with TTL 5V logic.
CPLDs that I have do not require any additional buffers.

Online gflorez

  • EP addict
  • *
  • Posts: 2624
  • Country: es
  • OS:
  • Windows XP Windows XP
  • Browser:
  • Firefox 52.0 Firefox 52.0
    • View Profile
Re: External colour tests
« Reply #36 on: 2018.July.26. 18:14:23 »
Of course, you are right.... I forgot that the Wing buffer cost me more than the FPGA.... But the chip used on the buffer is inexpensive.

The Spartan works at +3,3v.

On the other side, the Rom is being emulated inside the FPGA.

Offline pear

  • EP lover
  • *
  • Posts: 778
  • Country: pl
  • Z80 only
  • OS:
  • Windows 7/Server 2008 R2 Windows 7/Server 2008 R2
  • Browser:
  • Firefox 61.0 Firefox 61.0
    • View Profile
Re: External colour tests
« Reply #37 on: 2018.July.26. 18:44:50 »
An FPGA requires an external ROM in which its configuration is remembered (loaded into the FPGA after power on).
You can use part of the FPGA structure for ROM emulation, but its contents must be also loaded from the ROM configuration.

Offline ergoGnomik

  • EP lover
  • *
  • Posts: 797
  • Country: hu
  • Stray cat from Commodore alley
  • OS:
  • Windows 7/Server 2008 R2 Windows 7/Server 2008 R2
  • Browser:
  • Opera 12.17 Opera 12.17
    • View Profile
Re: External colour tests
« Reply #38 on: 2018.July.26. 19:06:19 »
An FPGA requires an external ROM in which its configuration is remembered (loaded into the FPGA after power on).
You can use part of the FPGA structure for ROM emulation, but its contents must be also loaded from the ROM configuration.
Well, not necessarily. Nowadays, AFAIK, there are instant on FPGAs with integrated Flash storage.

Offline pear

  • EP lover
  • *
  • Posts: 778
  • Country: pl
  • Z80 only
  • OS:
  • Windows 7/Server 2008 R2 Windows 7/Server 2008 R2
  • Browser:
  • Firefox 61.0 Firefox 61.0
    • View Profile
Re: External colour tests
« Reply #39 on: 2018.July.26. 19:16:29 »
Cheap Spartan6 has not.

Online gflorez

  • EP addict
  • *
  • Posts: 2624
  • Country: es
  • OS:
  • Windows XP Windows XP
  • Browser:
  • Firefox 52.0 Firefox 52.0
    • View Profile
Re: External colour tests
« Reply #40 on: 2018.July.26. 19:37:43 »
An FPGA requires an external ROM in which its configuration is remembered (loaded into the FPGA after power on).
You can use part of the FPGA structure for ROM emulation, but its contents must be also loaded from the ROM configuration.

You mean reloading the core. Yes, this board has a FlashRom to reload the core at start-up, but I still have not used it(I am still learning...)

Online gflorez

  • EP addict
  • *
  • Posts: 2624
  • Country: es
  • OS:
  • Windows XP Windows XP
  • Browser:
  • Firefox 52.0 Firefox 52.0
    • View Profile
Re: External colour tests
« Reply #41 on: 2018.July.26. 19:53:37 »
I have a lot of CPLD chips.
I'll try to use it instead of FPGA, but I'll need to use external RAM memory.

And has also a good amount of static Ram.

https://www.aliexpress.com/snapshot/0.html?orderId=506118864314676&productId=32818384452

Specs(on Chinese English...):



Master FPGA:XC6SLX16-2FTG256C;

Master FPGA external clock source frequency: 50MHz;

The XC6SLX16-FTG256 chip comes with rich Block RAM resources;

The number of logic units in XC6SLX16-FTG256 chip is 14579;

M25P80, SPI, Flash chips, 1MB bytes of storage capacity;

32MB micron SDRAM model MT48LC16M16A2;

Provides 3.3V power for core board chips, using MPS's MP2359 wide range input DC/DC;

Brings out the two row 64p and 2.54mm spacing blocks, which can be used for external 24Bit TFT LCD screen, CY7C68013 USB module, high-speed ADC Acquisition module or CMOS camera module, etc.;

Draws the 3 button of the chip for testing;

Leads to the chip's 4 way LED lamp for testing;

Leads the JTAG chip debug port, the single row 6p, 2.54mm row spacing;

Offline pear

  • EP lover
  • *
  • Posts: 778
  • Country: pl
  • Z80 only
  • OS:
  • Windows 7/Server 2008 R2 Windows 7/Server 2008 R2
  • Browser:
  • Firefox 61.0 Firefox 61.0
    • View Profile
Re: External colour tests
« Reply #42 on: 2018.July.26. 20:07:51 »
At the beginning I will use my exists project.
This is the interface of the 3D display controlled by ZX Spectrum.
It has a CPLD with 108 macrocells and 4KB of dual-port RAM.
Just reconfigure a bit. It's enough for tests.

Online gflorez

  • EP addict
  • *
  • Posts: 2624
  • Country: es
  • OS:
  • Windows XP Windows XP
  • Browser:
  • Firefox 52.0 Firefox 52.0
    • View Profile
Re: External colour tests
« Reply #43 on: 2018.July.26. 20:28:59 »
And about the buffer, I bought the same board to replicate exactly my friend Habi's approach:

http://store.gadgetfactory.net/io-buffer/

But the chip inside is inexpensive.

https://www.mouser.es/Texas-Instruments/Semiconductors/Switch-ICs/Digital-Bus-Switch-ICs/SN74CBT16245-Series/_/N-7590e?P=1yxz7gvZ1z0zls6


---------

Yes, it is better if you use your chips. I remember your 3D display...
« Last Edit: 2018.July.26. 23:02:15 by gflorez »